Table of Contents

List of Symbols     XIX
Acronyms     XXIV
Overview     1
Circuit Design with MOSFETs     3
MOSFET Modeling     5
Model Parameter Determination     9
Interconnect Modeling     10
Subjects Covered     11
References     11
Review of Basic Semiconductor and pn Junction Theory     15
Energy Band Model     15
Intrinsic Semiconductor     17
Fermi level     19
Extrinsic or Doped Semiconductor     21
Generation-Recombination     25
Quasi-Fermi Level     27
Electrical Conduction     28
Carrier Mobility     28
Resistivity and Sheet Resistance     33
Transport Equations     36
Continuity Equation     37
Poisson's Equation     38
pn Junction at Equilibrium     39
Built-in Potential     42
Depletion Width     43
Diode Current-Voltage Characteristics     46
Limitation of the Diode Current Model     48
Bulk Resistance     51
Junction Breakdown Voltage     52
Diode Dynamic Behavior     53
Junction Capacitance     53
Diffusion Capacitance     56
Small Signal Conductance     57
Real pn Junction     58
Diode Circuit Model     61
Temperature Dependent Diode Model Parameters     64
Temperature Dependence of I[subscript s]     64
Temperature Dependence of [Phi subscript bi]     66
Temperature Dependence of C[subscript jO]     66
References     67
MOS Transistor Structure and Operation     69
MOSFET Structure     69
MOSFET Characteristics     73
Punchthrough     81
MOSFET Capacitances     82
Small-Signal Behavior     84
Device Speed     86
MOSFET Scaling     87
Hot-Carrier Effects     90
VLSI Device Structures     93
Gate Material     93
Nonuniform Channel Doping     94
Source-Drain Structures     95
Device Isolation     98
CMOS Process     99
MOSFET Parasitic Elements     102
Source-Drain Resistance     102
Source/Drain Junction Capacitance     108
Gate Overlap Capacitances      109
MOSFET Length and Width Definitions     113
Effective or Electrical Channel Length     113
Effective or Electrical Channel Width     114
MOSFET Circuit Models     115
References     118
MOS Capacitor     121
MOS Capacitor with No Applied Voltage     121
Work Function     123
Oxide Charges     127
Flat Band Voltage     131
MOS Capacitor at Non-Zero Bias     133
Accumulation     135
Depletion     135
Inversion     138
Capacitance of MOS Structures     147
Low Frequency C-V Plot     153
High Frequency C-V Plot     154
Deep Depletion C-V Plot     155
Deviation from Ideal C-V Curves     156
Anomalous C-V Curve (Polysilicon Depletion Effect)     159
MOS Capacitor Applications     161
Nonuniformly Doped Substrate and Flat Band Voltage     162
Temperature Dependence of V[subscript fb]     163
References     165
Threshold Voltage     167
MOSFET with Uniformly Doped Substrate     167
Nonuniformly Doped MOSFET     177
Enhancement Type Device      179
Depletion Type Device     190
Threshold Voltage Variations with Device Length and Width     194
Short-Channel Effect     195
Narrow-Width Effect     205
Drain Induced Barrier Lowering (DIBL) Effect     210
Small-Geometry Effect     219
Temperature Dependence of the Threshold voltage     221
References     225
MOSFET DC Model     230
Drain Current Calculations     230
Pao-Sah Model     235
Charge-Sheet Model     238
Piece-Wise Drain Current Model for Enhancement Devices     243
First Order Model     244
Bulk-Charge Model     251
Square-Root Approximation     253
Drain Current Equation with Square-Root Approximation     257
Subthreshold Region Model     259
Limitations of the Model     267
Drain Current Model for Depletion Devices     270
Effective Mobility     276
Mobility Degradation Due to the Gate Voltage     277
Mobility Degradation Due to the Drain Voltage     284
Short-Geometry Models     287
Linear Region Model     289
Saturation Voltage     291
Saturation Region-Channel Length Modulation     295
Subthreshold Model     305
Continuous Model     307
Impact of Source-Drain Resistance on Drain Current     310
Temperature Dependence of the Drain Current     313
Temperature Dependence of Mobility     314
References     318
Dynamic Model     325
Intrinsic Charges and Capacitances     325
Meyer Model     328
Drawbacks of the Meyer Model     334
Charge-Based Capacitance Model     337
Long-Channel Charge Model     340
Capacitances     347
Short-Channel Charge Model     352
Capacitances     356
Limitations of the Quasi-Static Model     359
Small-Signal Model Parameters     360
References     364
Modeling Hot-Carrier Effects     366
Substrate Current Model     367
Gate Current Model     374
Correlation of Gate and Substrate Current     382
Mechanism of MOSFET Degradation     383
Measure of Degradation-Device Lifetime     388
Impact of Degradation on Circuit Performance     394
Temperature Dependence of Device Degradation      396
References     398
Data Acquisition and Model Parameter Measurements     402
Data Acquisition     403
Data for DC Models     410
Data for AC Models     414
MOS Capacitor C-V Measurement     418
Gate-Oxide Capacitance Measurement     421
Optical Method-Ellipsometry     421
Electrical Method     422
Measurement of Doping Profile in Silicon     427
Capacitance-Voltage Method     428
DC Method     436
Measurement of Threshold Voltage     438
Determination of Body Factor y     443
Flat Band Voltage     445
Drain Induced Barrier Lowering (DIBL) Parameter     445
Determination of Subthreshold Slope     447
Carrier Inversion Layer Mobility Measurement     448
Split-CV Method     452
Determination of Effective Channel Length and Width     457
Drain Current Methods of Determination [Delta]L     458
Capacitance Method of Determining [Delta]L     468
Methods of Determining [Delta]W     470
Determination of Drain Saturation Voltage     472
Measurement of MOSFET Intrinsic Capacitances     477
On-Chip Methods      477
Off-Chip Methods     481
Measurement of Gate Overlap Capacitance     484
Measurement of MOSFET Source/Drain Diode Junction Parameters     489
Diode Saturation or Reverse Current I[subscript s]     489
Junction Capacitance     493
References     494
Model Parameter Extraction Using Optimization Method     501
Model Parameter Extraction     501
Basics Definitions in Optimization     504
Optimization Methods     510
Constrained Optimization     515
Multiple Response Optimization     518
Some Remarks on Parameter Extraction Using Optimization Technique     521
Confidence Limits on Estimated Model Parameter     522
Examples of Redundant Parameters     527
Parameter Extraction Using Optimizer     531
Drain Current Model Parameter Extraction     532
MOSFET AC Model Parameter Extraction     533
References     534
SPICE Diode and MOSFET Models and Their Parameters     536
Diode Model     536
MOSFET Level 1 Model     542
DC Model     542
Capacitance Model     543
MOSFET Level 2 Model      548
DC Model     548
Capacitance Model     552
MOSFET Level 3 Model     554
DC Model     554
MOSFET Level 4 Model     556
DC Model     556
Capacitance Model     559
Comparison of the Four MOSFET Models     559
References     561
Statistical Modeling and Worst-Case Design Parameters     563
Methods of Generating Worst Case Parameters     564
Model Parameter Sensitivity     566
Principal Factor Method     567
Statistical Analysis with Parameter Correlation     569
Principal Component Analysis     571
Factor Analysis     572
Factor Rotation     574
Regression Models     574
Optimization Method     575
References     578
Important Properties of Silicon, Silicon Dioxide and Silicon Nitride at 300 K     580
Some Important Physical Constants at 300 K     581
Unit Conversion Factors     581
Magnitude Prefixes     581
Methods of Calculating [Phi subscript s] from the Implicit Eq. (6.23) or (6.30)
Charge Based MOSFET Intrinsic Capacitances     583
Linear Regression     587
Basic Statistical and Probability Theory     588
List of Widely Used Statistical Package Programs     599
Subject Index     600