Analog Integrated Circuit Design / Edition 2 available in Hardcover

Analog Integrated Circuit Design / Edition 2
- ISBN-10:
- 0470770104
- ISBN-13:
- 9780470770108
- Pub. Date:
- 12/13/2011
- Publisher:
- Wiley

Analog Integrated Circuit Design / Edition 2
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Overview
Product Details
ISBN-13: | 9780470770108 |
---|---|
Publisher: | Wiley |
Publication date: | 12/13/2011 |
Series: | CourseSmart Series |
Edition description: | 2nd ed. |
Pages: | 816 |
Product dimensions: | 7.50(w) x 9.40(h) x 1.30(d) |
About the Author
Table of Contents
CHAPTER 1 INTEGRATED-CIRCUIT DEVICES AND MODELLING 11.1 Semiconductors and pn Junctions 1
1.2 MOS Transistors 14
1.3 Device Model Summary 38
1.4 Advanced MOS Modelling 42
1.5 SPICE Modelling Parameters 50
1.6 Passive Devices 54
1.7 Appendix 60
1.8 Key Points 68
1.9 References 69
1.10 Problems 69
CHAPTER 2 PROCESSING AND LAYOUT 73
2.1 CMOS Processing 73
2.2 CMOS Layout and Design Rules 86
2.3 Variability and Mismatch 96
2.4 Analog Layout Considerations 103
2.5 Key Points 113
2.6 References 114
2.7 Problems 114
CHAPTER 3 BASIC CURRENT MIRRORS AND SINGLE-STAGE AMPLIFIERS 117
3.1 Simple CMOS Current Mirror 118
3.2 Common-Source Amplifier 120
3.3 Source-Follower or Common-Drain Amplifier 122
3.4 Common-Gate Amplifier 124
3.5 Source-Degenerated Current Mirrors 127
3.6 Cascode Current Mirrors 129
3.7 Cascode Gain Stage 131
3.8 MOS Differential Pair and Gain Stage 135
3.9 Key Points 138
3.10 References 139
3.11 Problems 139
CHAPTER 4 FREQUENCY RESPONSE OF ELECTRONIC CIRCUITS 144
4.1 Frequency Response of Linear Systems 144
4.2 Frequency Response of Elementary Transistor Circuits 165
4.3 Cascode Gain Stage 181
4.4 Source-Follower Amplifier 187
4.5 Differential Pair 193
4.6 Key Points 197
4.7 References 198
4.8 Problems 199
CHAPTER 5 FEEDBACK AMPLIFIERS 204
5.1 Ideal Model of Negative Feedback 204
5.2 Dynamic Response of Feedback Amplifiers 208
5.3 First- and Second-Order Feedback Systems 213
5.4 Common Feedback Amplifiers 220
5.5 Summary of Key Points 235
5.6 References 235
5.7 Problems 236
CHAPTER 6 BASIC OPAMP DESIGN AND COMPENSATION 242
6.1 Two-Stage CMOS Opamp 242
6.2 Opamp Compensation 254
6.3 Advanced Current Mirrors 261
6.4 Folded-Cascode Opamp 268
6.5 Current Mirror Opamp 275
6.6 Linear Settling Time Revisited 279
6.7 Fully Differential Opamps 281
6.8 Common-Mode Feedback Circuits 288
6.9 Summary of Key Points 292
6.10 References 293
6.11 Problems 294
CHAPTER 7 BIASING, REFERENCES, AND REGULATORS 302
7.1 Analog Integrated Circuit Biasing 302
7.2 Establishing Constant Transconductance 307
7.3 Establishing Constant Voltages and Currents 310
7.4 Voltage Regulation 321
7.5 Summary of Key Points 327
7.6 References 327
7.7 Problems 328
CHAPTER 8 BIPOLAR DEVICES AND CIRCUITS 331
8.1 Bipolar-Junction Transistors 331
8.2 Bipolar Device Model Summary 344
8.3 SPICE Modeling 345
8.4 Bipolar and BICMOS Processing 346
8.5 Bipolar Current Mirrors and Gain Stages 349
8.6 Appendix 356
8.7 Summary of Key Points 359
8.8 References 360
8.9 Problems 360
CHAPTER 9 NOISE AND LINEARITY ANALYSIS AND MODELLING 363
9.1 Time-Domain Analysis 363
9.2 Frequency-Domain Analysis 367
9.3 Noise Models for Circuit Elements 377
9.4 Noise Analysis Examples 387
9.5 Dynamic Range Performance 397
9.6 Key Points 405
9.7 References 406
9.8 Problems 406
CHAPTER 10 COMPARATORS 413
10.1 Comparator Specifications 413
10.2 Using an Opamp for a Comparator 415
10.3 Charge-Injection Errors 418
10.4 Latched Comparators 426
10.5 Examples of CMOS and BiCMOS Comparators 431
10.6 Examples of Bipolar Comparators 437
10.7 Key Points 439
10.8 References 440
10.9 Problems 440
CHAPTER 11 SAMPLE-AND-HOLD AND TRANSLINEAR CIRCUITS 444
11.1 Performance of Sample-and-Hold Circuits 444
11.2 MOS Sample-and-Hold Basics 446
11.3 Examples of CMOS S/H Circuits 452
11.4 Bipolar and BiCMOS Sample-and-Holds 456
11.5 Translinear Gain Cell 460
11.6 Translinear Multiplier 462
11.7 Key Points 464
11.8 References 465
11.9 Problems 466
CHAPTER 12 CONTINUOUS-TIME FILTERS 469
12.1 Introduction to Continuous-Time Filters 469
12.2 Introduction to Gm-C Filters 471
12.3 Transconductors Using Fixed Resistors 479
12.4 CMOS Transconductors Using Triode Transistors 484
12.5 CMOS Transconductors Using Active Transistors 493
12.6 Bipolar Transconductors 500
12.7 BiCMOS Transconductors 506
12.8 Active RC and MOSFET-C Filters 509
12.9 Tuning Circuitry 516
12.10 Introduction to Complex Filters 525
12.11 Key Points 531
12.12 References 532
12.13 Problems 534
CHAPTER 13 DISCRETE-TIME SIGNALS 537
13.1 Overview of Some Signal Spectra 537
13.2 Laplace Transforms of Discrete-Time Signals 537
13.3 z-Transform 541
13.4 Downsampling and Upsampling 543
13.5 Discrete-Time Filters 545
13.6 Sample-and-Hold Response 552
13.7 Key Points 554
13.8 References 555
13.9 Problems 555
CHAPTER 14 SWITCHED-CAPACITOR CIRCUITS 557
14.1 Basic Building Blocks 557
14.2 Basic Operation and Analysis 560
14.3 Noise in Switched-Capacitor Circuits 570
14.4 First-Order Filters 572
14.5 Biquad Filters 577
14.6 Charge Injection 585
14.7 Switched-Capacitor Gain Circuits 588
14.8 Correlated Double-Sampling Techniques 593
14.9 Other Switched-Capacitor Circuits 594
14.10 Key Points 600
14.11 References 601
14.12 Problems 602
CHAPTER 15 DATA CONVERTER FUNDAMENTALS 606
15.1 Ideal D/A Converter 606
15.2 Ideal A/D Converter 608
15.3 Quantization Noise 609
15.4 Signed Codes 612
15.5 Performance Limitations 614
15.6 Key Points 620
15.7 References 620
15.8 Problems 620
CHAPTER 16 NYQUIST-RATE D/A CONVERTERS 623
16.1 Decoder-Based Converters 623
16.2 Binary-Scaled Converters 628
16.3 Thermometer-Code Converters 634
16.4 Hybrid Converters 640
16.5 Key Points 642
16.6 References 643
16.7 Problems 643
CHAPTER 17 NYQUIST-RATE A/D CONVERTERS 646
17.1 Integrating Converters 646
17.2 Successive-Approximation Converters 650
17.3 Algorithmic (or Cyclic) A/D Converter 662
17.4 Pipelined A/D Converters 665
17.5 Flash Converters 673
17.6 Two-Step A/D Converters 677
17.7 Interpolating A/D Converters 680
17.8 Folding A/D Converters 683
17.9 Time-Interleaved A/D Converters 687
17.10 Key Points 690
17.11 References 691
17.12 Problems 692
CHAPTER 18 OVERSAMPLING CONVERTERS 696
18.1 Oversampling without Noise Shaping 696
18.2 Oversampling with Noise Shaping 702
18.3 System Architectures 711
18.4 Digital Decimation Filters 714
18.5 Higher-Order Modulators 718
18.6 Bandpass Oversampling Converters 721
18.7 Practical Considerations 722
18.8 Multi-Bit Oversampling Converters 727
18.9 Third-Order A/D Design Example 730
18.10 Key Points 732
18.11 References 734
18.12 Problems 735
CHAPTER 19 PHASE-LOCKED LOOPS 738
19.1 Basic Phase-Locked Loop Architecture 738
19.2 Linearized Small-Signal Analysis 748
19.3 Jitter and Phase Noise 756
19.4 Electronic Oscillators 765
19.5 Jitter and Phase Noise in PLLS 777
19.6 Key Points 781
19.7 References 782
19.8 Problems 782
INDEX 787