Architecture of Computing Systems - ARCS 2020: 33rd International Conference, Aachen, Germany, May 25-28, 2020, Proceedings

by André Brinkmann (Editor), Wolfgang Karl (Editor), Stefan Lankes (Editor), Sven Tomforde (Editor), Thilo Pionteck (Editor)

Overview

This book constitutes the proceedings of the 33rd International Conference on Architecture of Computing Systems, ARCS 2020, held in Aachen, Germany, in May 2020.*

The 12 full papers in this volume were carefully reviewed and selected from 33 submissions. 6 workshop papers are also included. ARCS has always been a conference attracting leading-edge research outcomes in Computer Architecture and Operating Systems, including a wide spectrum of topics ranging from embedded and real-time systems all the way to large-scale and parallel systems. The selected papers focus on concepts and tools for incorporating self-adaptation and self-organization mechanisms in high-performance computing systems. This includes upcoming approaches for runtime modifications at various abstraction levels, ranging from hardware changes to goal changes and their impact on architectures, technologies, and languages.

*The conference was canceled due to the COVID-19 pandemic.

Product Details

ISBN-13:	9783030527945
Publisher:	Springer-Verlag New York, LLC
Publication date:	07/09/2020
Series:	Lecture Notes in Computer Science , #12155
Sold by:	Barnes & Noble
Format:	eBook
File size:	12 MB
Note:	This product may take a few minutes to download.

Table of Contents

Main Conference.- Approximate Data Dependence Pro ling based on Abstract Interval and Congruent Domains.- Evaluating Dynamic Task Scheduling with Priorities and Adaptive Aging in a Task-based Runtime System.- An Architecture for Solving the Eigenvalue Problem on Embedded FPGAs.- ECC Memory for Fault Tolerant RISC-V Processors.- 3D Optimisation of Software Application Mappings on Heterogeneous MPSoCs.- Towards a Priority-Based Task Distribution Strategy for an Artificial Hormone System.- He..ro DB: A Concept for Parallel Data Processing on Heterogeneous Hardware.- Investigating Transactional Memory for High Performance Embedded Systems.- X-CEL: A Method to Estimate Near-Memory Acceleration Potential in Tile-based MPSoCs.- Engineering an Optimized Instruction Set Architecture for AMIDAR Processors.- Scaling Logic Locking Schemes to Multi-Module Hardware Designs.- Exploration of Power Domain Partitioning with Concurrent Task Mapping and Scheduling for Application-specific Multi-core SoCs.- FORMUS³IC Workshop.- Scalable, Decentralized Battery Management System Based on Self-Organizing Nodes.- Security Improvements by Separating the Cryptographic Protocol from the Network Stack onto a Multi-MCU Architecture.- Equally Distributed Bus-Communication Access Rights for Inter MCU Communication using Multimaster SPI.- Workshop on Computer Architectures in Space (CompSpace).- On the Evaluation of SEU Effects on AXI Interconnect within AP-SoCs.- Satellite Onboard Data Reduction using a Risc-V core inside an RTG4-based Data Processing Pipeline.- Workshop on Parallel Systems and Algorithms (PASA).- Accelerating Real-Time Applications with Predictable Work-Stealing.