Title: Modeling with an Analog Hardware Description Language / Edition 1, Author: H. Alan Mantooth
Title: Writing Testbenches using SystemVerilog / Edition 1, Author: Janick Bergeron
Title: System-on-Chip Methodologies & Design Languages / Edition 1, Author: Peter J. Ashenden
Title: Higher-Level Hardware Synthesis / Edition 1, Author: Richard Sharp
Title: Optimized ASIP Synthesis from Architecture Description Language Models / Edition 1, Author: Oliver Schliebusch
Title: Writing Testbenches using SystemVerilog / Edition 1, Author: Janick Bergeron
Title: CTL for Test Information of Digital ICs / Edition 1, Author: Rohit Kapur
Title: Architecture Exploration for Embedded Processors with LISA / Edition 1, Author: Andreas Hoffmann
Title: System-on-Chip Methodologies & Design Languages / Edition 1, Author: Peter J. Ashenden
Title: Analog and Mixed-Signal Hardware Description Language / Edition 1, Author: A. Vachoux
Title: Practical Formal Methods for Hardware Design, Author: Carlos Delgado Kloos
Title: System Specification & Design Languages: Best of FDL'02 / Edition 1, Author: Eugenio Villar
Title: High-Level Synthesis: from Algorithm to Digital Circuit / Edition 1, Author: Philippe Coussy
Title: Fundamentals and Standards in Hardware Description Languages / Edition 1, Author: Jean Mermet
Title: High-Level Synthesis: from Algorithm to Digital Circuit / Edition 1, Author: Philippe Coussy
Title: The e Hardware Verification Language, Author: Sasan Iman
Title: System Specification & Design Languages: Best of FDL'02 / Edition 1, Author: Eugenio Villar
Title: Writing Testbenches: Functional Verification of HDL Models / Edition 2, Author: Janick Bergeron
Title: The e Hardware Verification Language / Edition 1, Author: Sasan Iman
Title: High-Level System Modeling: Specification Languages / Edition 1, Author: Jean-Michel Bergï

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