Power-Aware Testing and Test Strategies for Low Power Devices

by Patrick Girard (Editor), Nicola Nicolici (Editor), Xiaoqing Wen (Editor)

Overview

Managing the power consumption of circuits and systems is now considered one of the most important challenges for the semiconductor industry. Elaborate power management strategies, such as dynamic voltage scaling, clock gating or power gating techniques, are used today to control the power dissipation during functional operation. The usage of these strategies has various implications on manufacturing test, and power-aware test is therefore increasingly becoming a major consideration during design-for-test and test preparation for low power devices. This book explores existing solutions for power-aware test and design-for-test of conventional circuits and systems, and surveys test strategies and EDA solutions for testing low power devices.

Product Details

ISBN-13:	9781489983138
Publisher:	Springer US
Publication date:	09/05/2014
Edition description:	2010
Pages:	363
Product dimensions:	6.10(w) x 9.25(h) x 0.03(d)

Table of Contents

Fundamentals of VLSI Testing.- Power Issues During Test.- Low-Power Test Pattern Generation.- Power-Aware Design-for-Test.- Power-Aware Test Data Compression and BIST.- Power-Aware System-Level Test Planning.- Low-Power Design Techniques and Test Implications.- Test Strategies for Multivoltage Designs.- Test Strategies for Gated Clock Designs.- Test of Power Management Structures.- EDA Solution for Power-Aware Design-for-Test.