Low Power Methodology Manual: For System-on-Chip Design

“Tools alone aren't enough to reduce dynamic and leakage power in complex chip designs - a well-planned methodology is needed. Following in the footsteps of the successful Reuse Methodology Manual (RMM), authors from ARM and Synopsys have written this Low Power Methodology Manual (LPMM) to describe [such] [a] low-power methodology with a practical, step-by-step approach.”

Richard Goering, Software Editor, EE Times

“Excellent compendium of low-power techniques and guidelines with balanced...