RISC-V Assembly Language Programming using ESP32-C3 and QEMU

With the availability of free and open source C/C++ compilers today, you might wonder why someone would be interested in assembler language. What is so compelling about the RISC-V Instruction Set Architecture (ISA)? How does RISC-V differ from existing architectures? And most importantly, how do we gain experience with the RISC-V without a major investment? Is there affordable hardware available? The availability of the Espressif ESP32-C3 chip provides a way to get hands-on experience with ...