High-Level Synthesis for Real-Time Digital Signal Processing

High—Level Synthesis for Real—Time Digital Signal Processing is a comprehensive reference work for researchers and practicing ASIC design engineers. It focuses on methods for compiling complex, low to medium throughput DSP system, and on the implementation of these methods in the CATHEDRAL—II compiler.
The emergence of independent silicon foundries, the reduced price of silicon real estate and the shortened processing turn—around time bring silicon technology within reach of system houses....