Reversible and Quantum Circuits: Optimization and Complexity Analysis

by Nabila Abdessaied, Rolf Drechsler

Overview

This book presents a new optimization flow for quantum circuits realization. At the reversible level, optimization algorithms are presented to reduce the quantum cost. Then, new mapping approaches to decompose reversible circuits to quantum circuits using different quantum libraries are described. Finally, optimization techniques to reduce the quantum cost or the delay are applied to the resulting quantum circuits. Furthermore, this book studies the complexity of reversible circuits and quantum circuits from a theoretical perspective.

Product Details

ISBN-13:	9783319319353
Publisher:	Springer International Publishing
Publication date:	06/07/2016
Edition description:	1st ed. 2016
Pages:	186
Product dimensions:	6.10(w) x 9.25(h) x (d)

About the Author

Nabila Abdessaied is a researcher at the German Research Center for Artificial Intelligence (DFKI) since 2013. She received the Diplôme d'Ingénieur in computer science from the University of sciences in Tunis, Tunisia, in 2007. Then, she obtained her Master degree in computer science from the National Engineering School of Sousse, Tunisia, in 2009. In 2012, she joined the Institute of Computer Science of the University of Bremen where she received her Dr.-Ing. degree in computer science in 2015. Nabila Abdessaied is interested in the optimization of reversible and quantum circuits and studying their complexity. Furthermore, she is also working in the field of requirements engineering using NLP techniques.

Rolf Drechsler is head of Cyber-Physical Systems department at the German Research Center for Artificial Intelligence (DFKI) since 2011. Furthermore, he is a Full Professor at the Institute of Computer Science, University of Bremen, since 2001. Before, he worked for the Corporate Technology Department of Siemens AG, and was with the Institute of Computer Science, Albert-Ludwig University of Freiburg/Breisgau, Germany. Rolf Drechsler received the Diploma and Dr. Phil. Nat. degrees in computer science from the Goethe-University in Frankfurt/Main, Germany, in 1992 and, respectively, 1995. Rolf Drechsler focusses in his research at DFKI and in the Group for Computer Architecture, which he is heading at the Institute of Computer Science of the University of Bremen, on the development and design of data structures and algorithms with an emphasis on circuit and system design.

Table of Contents

1 Introduction . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . .. . . 1
1.1 Book Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.1.1 Optimization of Quantum Circuits . . . . . . . . . . . . . . . . . . . . . . 4
1.1.2 Complexity Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.2 Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
2 Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.1 Boolean Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2 Boolean Function Decomposition . . . . . . . . . . . . . . . . . . . . . . . . 10
2.2.1 Ashenhurst Decomposition . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.2.2 Curtis Decomposition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.2.3 Bi-decomposition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.2.4 Multiplexer Decomposition . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.3 Exclusive-OR Sum Of Products . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.4 Boolean Satisfiability and SAT Modulo Theory . . . . . . . . . . . . . . . . . 14
2.5 Reversible Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2.5.1 Reversible Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.5.2 Reversible Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2.5.3 Reversible Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
2.6 Quantum Computation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
2.6.1 Quantum Systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
2.6.2 Quantum Libraries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
2.6.3 Quantum Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
2.7 Cost Metrics for Reversible and Quantum Circuits . . . . . . . . . . . . . . . 32
2.7.1 Quantum Cost . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
2.7.2 Number of Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
2.7.3 Number of Lines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
2.7.4 Depth . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
2.7.5 Nearest Neighbor Cost . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
2.8 Decision Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
2.8.1 Binary Decision Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
2.8.2 Quantum Multiple-valued Decision Diagrams . . . . . . . . . . . . 38
3 Optimizations and Complexity Analysis on the Reversible Level . . . . . 45
3.1 Related Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
3.1.1 Optimization Approaches of Reversible Circuits . . . . . . . . . . 45
3.1.2 Complexity of Reversible Circuits . . . . . . . . . . . . . . . . . . . . . . 513.2 Exact Quantum Cost Optimization . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
3.2.1 General Idea . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
3.2.2 Encoding Using SMT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
3.2.3 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
3.3 Heuristic Quantum Cost Optimization . . . . . . . . . . . . . . . . . . . . . . . . . 63
3.3.1 Simulated Annealing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
3.3.2 Rewriting Rules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
3.3.3 Algorithms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 673.3.4 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
3.4 Complexity Analysis of Reversible Circuits . . . . . . . . . . . . . . . . . . . . . 79
3.4.1 Complexity of Single-target Circuits . . . . . . . . . . . . . . . . . . . . 80
3.4.2 Complexity of MPMCT Circuits . . . . . . . . . . . . . . . . . . . . . . . 81
3.4.3 Upper Bounds for Single-target Gates . . . . . . . . . . . . . . . . . . . 82
3.4.4 Upper Bounds for Reversible Circuits . . . . . . . . . . . . . . . . . . . 84
3.5 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 864 Optimization and Complexity Analysis on the Mapping Level . . . . . . . 87
4.1 Related Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
4.1.1 Mapping Approaches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
4.1.2 Complexity of NCT Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
4.2 Improving the Mapping of Single-target Gates . . . . . . . . . . . . . . . . . . 96
4.2.1 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
4.2.2 Mapping of Single-target Gates . . . . . . . . . . . . . . . . . . . . . . . . 98
4.2.3 Experimental Evaluation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1014.2.4 Remarks and Observations . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
4.3 Improving the Mapping of MPMCT Gates to Clifford+T Circuits . . 107
4.3.1 Clifford+T Aware Reversible Circuit Mapping . . . . . . . . . . . . 107
4.3.2 Proposed Mapping Approaches . . . . . . . . . . . . . . . . . . . . . . . . 108
4.3.3 MPMCT Gates Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
4.3.4 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
4.4 Complexity Analysis of NCT Circuits . . . . . . . . . . . . . . . . . . . . . . . . . 122
4.4.1 Upper Bounds for MPMCT Gates . . . . . . . . . . . . . . . . . . . . . . 1224.4.2 Upper Bounds for Single-target Gates . . . . . . . . . . . . . . . . . . . 123
4.4.3 Upper Bounds for NCT Circuits . . . . . . . . . . . . . . . . . . . . . . . . 131
4.5 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132

5 Optimizations and Complexity Analysis on the Quantum Level . . . . . . 135
5.1 Related Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135
5.1.1 Optimization of Quantum Circuits . . . . . . . . . . . . . . . . . . . . . . 135
5.1.2 Complexity of Quantum Circuits . . . . . . . . . . . . . . . . . . . . . . . 139
5.2 Depth Optimization for NCV Circuits . . . . . . . . . . . . . . . . . . . . . . . . . 140
5.2.1 General Idea . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142
5.2.2 Optimization Approaches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143
5.2.3 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148
5.3 NCV-cost Optimization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150
5.3.1 Proposed Idea . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151
5.3.2 Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152
5.3.3 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153
5.4 Complexity Analysis of Quantum Circuits . . . . . . . . . . . . . . . . . . . . . . 156
5.4.1 Complexity of NCV Quantum Circuits . . . . . . . . . . . . . . . . . . 156
5.4.2 Complexity of Clifford+T Quantum Circuits . . . . . . . . . . . . . 161
5.5 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 166
6 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171