Substrate Noise Coupling in RFICs

Substrate noise coupling in integrated circuits (ICs) is the process by which int- ference signals in the form of voltage and current glitches cause parasitic currents to flow in the silicon substrate to various parts of the IC. The source of such glitches and parasitic currents could be from the switching noise of high speed digital clocks on the same chip. In RF and mixed signal ICs the switching noise is coupled to sensitive analog and RF nodes in the IC causing degradation in performanc...